No Memory Abstraction

• all processeses see all memory
• only one process at a time
• swapping whole process-memory in from disc when process runs

Absolute Addresses

• only works if the base address at which the program is loaded is always the same

Memory Allocation

Static Relocation

• rewrite all memory references when a program is loaded
  • slow, inelegant

Fixed Partitioning

• Physical Memory is broken up into fixed partitions
• Each program gets one partition
• Base Register stores base address for each partition

• easy to implement
• fast context swithc

• internal fragmentation: not all memory in one partition used

Variable Partitioning

• partitions have variable size
• base register and limit register

• no internal fragmentation

• external fragmentation: addition and removal of partitions create not used space

Virtual Memory

• a process works within it own virtual addresses space
• translation to physical addresses can change every time a process is dispatched
• physical address space does not need to be continuously located

Virtual Memory with Segmentation

• each process gets many segments allocated
• Segment Table maps each segment to physical address space
  • Segment Table Base Eegister (STBR) points to base address
  • Segment Table Length Eegister (STLR) stores length of segment

• no internal fragmentation
• no need for long continuous memory space, only shorter segments need to be continuous

• external fragmentation: addition and removal of segments create not used space

Virtual Memory with Paging

• Memory is split in equally sized blocks, called pages
• each virtual memory page can be mapped to any physical memory frame
  • -> shared memory possible
  • each mapping can have the permission for read, write, execute

Address Translation

• the virtual page number gets translated to the physical frame number
• the offset is not translated

• Mapping is stored in the Page Table
  • can be implemented as set of dedicated registers
  • can be stored in memory | issue: slow
  • best: Use of Translation Look-aside Buffer (TLB)
    • TLB is cache for the Page Table
• To reduce size of page table -> Multiple Page Tables
  • today 4 levels of page tables

Page Protection

• pages can be
  • read only
  • valid: page is in process's logical address space
  • invalid: page is not in process's logical address space